• DocumentCode
    2778643
  • Title

    Memory-memory-memory Clos-network packet switches with in-sequence service

  • Author

    Dong, Ziqian ; Rojas-Cessa, Roberto ; Oki, Eiji

  • Author_Institution
    Dept. of Electr. & Comput. Eng., New York Inst. of Technol., New York, NY, USA
  • fYear
    2011
  • fDate
    4-6 July 2011
  • Firstpage
    121
  • Lastpage
    125
  • Abstract
    Out-of-sequence is a problem faced by multi-stage buffered Clos-network switches. This paper proposes two buffered three-stage Clos-network packet switches that service packets in sequence and provide high switching performance. The proposed switches require short configuration times as compared to existing bufferless or partially buffered Clos-network switches. The proposed switches use time stamps assigned at the input modules to identify the order of packets in the switch. The switches use time-stamp monitoring mechanisms either at the input modules in a switch called the MMM-IM switch, or at the output modules in a switch called the MMM-OM switch to keep packets in sequence. Synchronization among different switch modules is not required in the proposed switches. The switching performance study presented in this paper shows that in-sequence monitoring at the IM provides higher performance and larger scalability than in-sequence monitoring at the output. Furthermore, the throughput of the MMM-IM switch is comparable to that of a switch that may service packets out of sequence.
  • Keywords
    monitoring; multistage interconnection networks; packet switching; sequences; synchronisation; Clos network switches; MMM-IM switch; MMM-OM switch; in-sequence monitoring; memory-memory-memory switch; out-of-sequence; packet switches; synchronization; time-stamp monitoring mechanisms; Conferences; Delay; Dispatching; Memory management; Switches; Throughput; Clos-network; buffered switch; iterative matching; memory-memory-memory switch; packet switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Switching and Routing (HPSR), 2011 IEEE 12th International Conference on
  • Conference_Location
    Cartagena
  • Print_ISBN
    978-1-4244-8454-6
  • Electronic_ISBN
    978-1-4244-8455-3
  • Type

    conf

  • DOI
    10.1109/HPSR.2011.5986014
  • Filename
    5986014