Title :
Ultra low power implementation of 2-D DCT for image/video compression
Author :
Thoudam, Vimal P Singh ; Bhaumik, B. ; Chatterjee, S.
Author_Institution :
Dept. of EE, IIT Delhi, New Delhi, India
Abstract :
This paper presents ultra low power implementation of eight-point 2-D DCT (Discrete Cosine Transform) based on a Loeffler DCT scheme. The proposed implementation scheme does not require any multiplier as well as scaling compensation in the computation. The constant coefficient in the rotation blocks are represented in CSD (Canonic Signed Digit) and the multiplication is approximated by shift and add operation. Clock gating scheme is also employed in the implementation to reduce power consumption further.
Keywords :
data compression; digital arithmetic; discrete cosine transforms; low-power electronics; power consumption; video coding; Loeffler DCT scheme; canonic signed digit; clock gating scheme; discrete cosine transform; image compression; power consumption; rotation blocks; ultra low power 2D DCT implementation; video compression; Clocks; Computer architecture; Discrete cosine transforms; Pixel; Quantization; Registers; Very large scale integration; CSD; DCT; low-power;
Conference_Titel :
Computer Applications and Industrial Electronics (ICCAIE), 2010 International Conference on
Conference_Location :
Kuala Lumpur
Print_ISBN :
978-1-4244-9054-7
DOI :
10.1109/ICCAIE.2010.5735138
