• DocumentCode
    2780450
  • Title

    Dual work function high-k/Metal Gate CMOS FinFETs

  • Author

    Hussain, Muhammad Mustafa ; Smith, Casey ; Kalra, Pankaj ; Yang, Ji-Woon ; Gebara, Gabe ; Sassman, Barry ; Kirsch, Paul ; Majhi, Prashant ; Song, Seung-Chul ; Harris, Rusty ; Tseng, Hsing Huang ; Jammy, Raj

  • Author_Institution
    SEMATECH, Austin
  • fYear
    2007
  • fDate
    11-13 Sept. 2007
  • Firstpage
    207
  • Lastpage
    209
  • Abstract
    For the first time, a set of complementary metal oxide semiconductor (CMOS) FinFET devices with two different high-k/metal gate stacks of dual work function has been integrated on the same wafer to overcome the integration complexity. Two completely different metals deposited by atomic layer deposition have been integrated in a process that includes gate stack integration and dual metal gate etch. Excellent short channel characteristics with low drain induced barrier lowering (DIBL) and subthreshold swing DeltaSS have been observed with fairly symmetric VTh.
  • Keywords
    CMOS integrated circuits; MOSFET; atomic layer deposition; etching; wafer-scale integration; work function; CMOS FinFET devices; atomic layer deposition; complementary metal oxide semiconductor; drain induced barrier lowering; dual work function; etching; high-k/metal gate stacks; short channel characteristics; subthreshold swing; wafer level integration; Atomic layer deposition; Business communication; CMOS technology; Etching; FinFETs; High K dielectric materials; High-K gate dielectrics; Jamming; Silicon; Tin;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Device Research Conference, 2007. ESSDERC 2007. 37th European
  • Conference_Location
    Munich
  • ISSN
    1930-8876
  • Print_ISBN
    978-1-4244-1123-8
  • Electronic_ISBN
    1930-8876
  • Type

    conf

  • DOI
    10.1109/ESSDERC.2007.4430915
  • Filename
    4430915