DocumentCode :
2783129
Title :
Mechanism and Modeling of PMOS NBTI Degradation with Drain Bias
Author :
Luo, Yuhao ; Orona, Joel ; Nayak, Deepak ; Gitlin, Daniel
Author_Institution :
Technol. Dev. Group, Xilinx Inc., San Jose, CA
fYear :
2007
fDate :
15-19 April 2007
Firstpage :
264
Lastpage :
267
Abstract :
A new mechanism for PMOS NBTI (negative biased temperature instability) with drain bias is presented. The turnaround behavior of device degradation is explained. While drain bias reduces gate oxide voltage and causes less NBTI, the channel-hot-hole enhances the NBTI degradation. For the first time, a semi-empirical model is proposed that fits well with the experimental data, including various parameters, such as temperature, voltage, channel length, and drive current.
Keywords :
MOSFET; semiconductor device models; semiconductor device reliability; NBTI; PMOS transistors; channel-hot-hole; device degradation; negative biased temperature instability; CMOS technology; Circuit testing; Current measurement; Degradation; Hot carriers; Niobium compounds; Stress; Temperature dependence; Titanium compounds; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability physics symposium, 2007. proceedings. 45th annual. ieee international
Conference_Location :
Phoenix, AZ
Print_ISBN :
1-4244-0919-5
Electronic_ISBN :
1-4244-0919-5
Type :
conf
DOI :
10.1109/RELPHY.2007.369903
Filename :
4227644
Link To Document :
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