Random Dopant Effect on Vt Variations Affecting the Soft-Error Rates of Nanoscale CMOS Memory Cells

In the soft error domain, the critical charge Q_critis used as a measure to determine if a memory cell can be upset, and on that single value most hardening techniques are based. Inaccurate estimates of the critical charge can lead to failure of hardening schemes causing space-based and terrestrial electronics to malfunction leading to prohibitive losses in cost and yield. With the design for manufacturability (DFM) becoming an issue in advanced technologies as process variation worsens, the statistical modeling of variations in threshold voltage leads to a wider range of critical charge. This paper quantifies the spread in critical charge required for an upset due to statistical variations in threshold voltage in the IBM 130 nm and 90 nm technologies. Design guidelines to account for the spread in Q_crit for an SEU in SRAM cells can be developed from simulations performed to estimate effective SER rates for memory cells.