• DocumentCode
    2783440
  • Title

    Modeling of Interconnect Dielectric Lifetime Under Stress Conditions and New Extrapolation Methodologies for Time-Dependent Dielectric Breakdown

  • Author

    Haase, Gaddi S. ; McPherson, Joe W.

  • Author_Institution
    Texas Instruments, Dallas, TX
  • fYear
    2007
  • fDate
    15-19 April 2007
  • Firstpage
    390
  • Lastpage
    398
  • Abstract
    Advanced microelectronics interconnect systems can have metal leads several hundred meters long with minimum metal to metal spacing of <100nm. The low-k dielectric between adjacent metal lines has a lower dielectric breakdown strength compared to gate oxides. Accelerated testing of the interconnect time-dependent dielectrics breakdown (TDDB) is required during the development of new technology nodes, to ensure the reliability of these systems. This paper presents simulations that show how actual line-to-line spacing variations influence test results such that they can predict too low product lifetime. In fact, it is argued here that one can adhere to a conservative model for the lifetime dependence on the electric field (such as the is-model) and still pass stringent reliability requirements if the accelerated breakdown test results distributions are interpreted correctly.
  • Keywords
    electric breakdown; extrapolation; integrated circuit interconnections; interconnect dielectric lifetime; line spacing variations; microelectronics interconnect systems; time-dependent dielectric breakdown; Acceleration; Dielectric breakdown; Electric breakdown; Extrapolation; Life estimation; Life testing; Microelectronics; Predictive models; Stress; Temperature;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability physics symposium, 2007. proceedings. 45th annual. ieee international
  • Conference_Location
    Phoenix, AZ
  • Print_ISBN
    1-4244-0919-5
  • Electronic_ISBN
    1-4244-0919-5
  • Type

    conf

  • DOI
    10.1109/RELPHY.2007.369921
  • Filename
    4227662