Title :
IEE Colloquium on `Design for Testability´ (Digest No.102)
Abstract :
The following topics were dealt with: design for testability; VLSI IC testing; test pattern generation; probabilistic testing; hierarchical path sensitisation; and CAD
Keywords :
VLSI; automatic test equipment; digital integrated circuits; integrated circuit testing; logic CAD; CAD; VLSI IC testing; design for testability; hierarchical path sensitisation; probabilistic testing; test pattern generation;
Conference_Titel :
Design for Testability, IEE Colloquium on
Conference_Location :
London
