Extended Reliability Study of High Density PZT Capacitors: Intrinsic Lifetime Determination and Wafer Level Screening Strategy

The processing of high-k PZT material enables to reach specific capacitance values up to 30 nF/mm². This paper proposed an extended reliability study of integrated PZT capacitors, including both intrinsic and extrinsic issues. The intrinsic lifetime projections are given by a complete reliability model, developed from a basic time-dependent dielectric breakdown characterization. Several intrinsic failure mechanisms were identified depending on the applied voltage stress level. Hence, the authors adopted a testing methodology based on cumulated voltage and temperature accelerations, which enables to emulate only the relevant failure mechanism for lifetime extrapolation. Concerning the early failure rate issue, the authors developed an efficient wafer level screening procedure which enables to get rid of the whole extrinsic population. This screening methodology consists in applying an in-line bias pulse to all capacitors after the last etching step. The main difficulty to overcome for the industrial implementation of this procedure was the detection of defective devices. This issue was solved through the detection of negative dV/dt discharging peaks during the bias pulse application. Finally both intrinsic lifetime results and early failure rate obtained by this screening methodology turns out to be satisfying enough for technology qualification and industrialization.