Accurate Resistance Modeling for Carbon Nanotube Bundles in VLSI Interconnect

Single-walled carbon nanotube bundles have the potential to provide an attractive solution for the resistivity and electromigration problems faced by traditional copper interconnect. In this paper, we discuss the modeling of nanotube bundle resistance for on-chip interconnect applications. Based on recent experimental results, we model the affect of nanotube diameter on contact and ohmic resistance. The results indicate that neglecting the diameter-dependent nature of ohmic and contact resistances can produce errors as high as 120 percent. Using the diameter-dependent resistance model, we show that SWCNT bundles can provide a significant reduction in resistance when compared with traditional copper interconnect depending on bundle geometry and individual nanotube diameter.