DocumentCode :
2783872
Title :
Nanoelectronic Circuits for Stochastic Computing
Author :
Yamamoto, Naoya ; Fujisaka, Hisato ; Haeiwa, Kazuhisa ; Kamio, Takeshi
Author_Institution :
Faculty of Information Sciences, Hiroshima City University, Hiroshima, 731-3194 Japan
Volume :
1
fYear :
2006
fDate :
17-20 June 2006
Firstpage :
306
Lastpage :
309
Abstract :
This paper presents a bit-rate converter and arithmetic circuits for nanoelectronic signal processing systems based on stochastic computing architecture. A bit-rate conversion circuit converts probabilistic high-rate binary signals to low-rate binary signals without increasing quantization noise power in a signal band. Arithmetic circuits operate on the low-rate signals with the noise spectral distribution kept unchanged. Thus, wide-band signals can be processed with the conversion circuits and the arithmetic circuits. We designed these circuits in logic level using simple sorting modules which separate bits of logical ”1” and ”0”. Then, we designed the QCA circuits equivalent to the logic circuits. Coincidental behavior between the circuits built of QCA and logic gates is confirmed by using QCA designer and a logic level simulator.
Keywords :
Arithmetic; Circuit noise; Computer architecture; Logic circuits; Logic design; Quantum cellular automata; Signal processing; Stochastic processes; Stochastic resonance; Stochastic systems;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nanotechnology, 2006. IEEE-NANO 2006. Sixth IEEE Conference on
Print_ISBN :
1-4244-0077-5
Type :
conf
DOI :
10.1109/NANO.2006.247636
Filename :
1717086
Link To Document :
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