Title :
Correlating Wafer-Level TDDB Lifetime Projections to HTOL Gate-Oxide Failures
Author :
Ditali, Akram ; Le, Huy A. ; Butler, David L. ; Ingram, Mark ; Ma, Manny
Author_Institution :
Micron Technol., Inc., Boise, ID
Abstract :
The power-law model provides a relatively good correlation between the wafer-level (WL) time-dependent dielectric breakdown (TDDB) test (highly accelerated) conducted on test structures and high-temperature operating life (HTOL) test (moderately accelerated) conducted on product. This is true when WL stress is configured identically to HTOL stress, and the difference in oxide area between the two devices under stress is taken into account for lifetime projections.
Keywords :
electric breakdown; high-temperature techniques; life testing; HTOL gate-oxide failures; TDDB lifetime projections; high-temperature operating life test; power-law model; wafer-level time-dependent dielectric breakdown test; Acceleration; Circuit testing; Extrapolation; Leakage current; Life estimation; Life testing; Performance evaluation; Stress; Temperature sensors; Voltage;
Conference_Titel :
Reliability physics symposium, 2007. proceedings. 45th annual. ieee international
Conference_Location :
Phoenix, AZ
Print_ISBN :
1-4244-0919-5
Electronic_ISBN :
1-4244-0919-5
DOI :
10.1109/RELPHY.2007.369955
