DocumentCode :
2784204
Title :
Board Level ESD of Driver ICS on LCD Panels
Author :
Hsu, C.T. ; Tseng, J.C. ; Chen, Y.L. ; Tsai, F.Y. ; Yu, S.H. ; Chen, P.A. ; Ker, M.D.
Author_Institution :
Device Technol. Dev. Div., Winbond Electron. Corp., Hsinchu
fYear :
2007
fDate :
15-19 April 2007
Firstpage :
590
Lastpage :
591
Abstract :
A method utilizing charged device model (CDM) discharging to emulate real-world charged board model (CBM) discharging was proposed and successfully addressed the weakest spot of whole chip. In order to extract the correlation between CDM pre-fail voltage VCDM and CBM pre-fail voltage VCBM, the capacitance and discharging waveforms of output pin on an IC and printed circuit board (PCB) were measured. The results showed that the CBM evaluation board (EB) was not a must for large-size chip, as LCD driver ICs. CDM discharging can be used to direct investigate the weak point of design/layout for large-size chip. Besides, this paper addresses the guidelines about chip-level ESD cell design and layout optimization against CBM ESD damage.
Keywords :
driver circuits; electrostatic discharge; liquid crystal displays; printed circuits; LCD panels; PCB; board level ESD; charged board model; charged device model; driver IC; layout optimization; printed circuit board; Capacitance measurement; Degradation; Diodes; Driver circuits; Electronic mail; Electrostatic discharge; Protection; Semiconductor device measurement; Testing; Voltage; CBM; CDM; ESD; HBM; PCB;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability physics symposium, 2007. proceedings. 45th annual. ieee international
Conference_Location :
Phoenix, AZ
Print_ISBN :
1-4244-0919-5
Electronic_ISBN :
1-4244-0919-5
Type :
conf
DOI :
10.1109/RELPHY.2007.369965
Filename :
4227706
Link To Document :
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