Title :
Use of reference architectures to achieve low-risk, affordable radar designs
Author :
Jeffrey, Thomas W.
Author_Institution :
Raytheon Integrated Defense Syst., Sudbury, MA, USA
Abstract :
The availability of radar reference architectures for software and hardware can enable the development of affordable radar systems through maximal reuse and low-risk designs. Affordability through reduced design cycle times and efficient integration and test of new radars is crucial to remain competitive and to maintain leadership in developing world-class phased-array radars. Necessary complements to these developments are reusable radar processing algorithms and functions necessary to rapidly synthesize these new radar designs. A compilation of algorithms used by common ground-based and sea-based radar reference architectures is described. Notional radar software and hardware building blocks or "widgets" are also identified. These architectural building blocks can be used to synthesize scalable radar architectures by employing software and hardware reference architectures. This synthesis approach is illustrated by providing examples using two different radar applications. This approach is applicable to all radar systems, in addition to systems-of-systems, where the building architectural blocks are the component system reference architectures.
Keywords :
phased array radar; radar computing; radar signal processing; building architectural blocks; ground-based radar reference architectures; notional radar hardware; notional radar software; phased-array radars; radar processing algorithms; sea-based radar reference architectures; Computer architecture; Hardware; Horn antennas; Narrowband; Radar antennas; Radio frequency; Receiving antennas; Spaceborne radar; Testing; Transmitting antennas; radar architectures; reference architectures; scalable architectures;
Conference_Titel :
Radar Conference, 2010 IEEE
Conference_Location :
Washington, DC
Print_ISBN :
978-1-4244-5811-0
DOI :
10.1109/RADAR.2010.5494615