• DocumentCode
    2785600
  • Title

    Ge Nanowire Synthesis for Chip-Specific Application

  • Author

    Sun, X.H. ; Yu, B. ; Calebotta, G.A. ; Meyyappan, M.

  • Author_Institution
    Center for Nanotechnology, NASA Ames Research Center, Moffett Field, CA 94035, USA
  • Volume
    2
  • fYear
    2006
  • fDate
    17-20 June 2006
  • Firstpage
    616
  • Lastpage
    619
  • Abstract
    Nanoelectronic field-effect devices fabricated with 1-D semiconductor nanowires synthesized by bottom-up techniques are likely among those immediate successors of the top-down silicon CMOS technology, preserving the spirit of Moore´s Law. The nanotechnology-embedded chip technology may emerge in the foreseeable future. However, there exists a gap between synthesis research and industrial application. Some of the critical integration issues need to be addressed before nanowire-based chip technology becomes truly impacting. In this paper, efforts are made in directing nanowire synthesis towards realistic implementation in future miniaturized chip. The research work include i) low-temperature and high-yield Ge nanowire synthesis, ii) Ge nanowires-on-insulator (GeNOI), iii) industry-benign metal catalysts, and iv) Ge quantum-wires synthesis.
  • Keywords
    Nanowire; germanium; nanotechnology; Assembly; CMOS technology; Chemical technology; Gold; Moore´s Law; Morphology; Nanoscale devices; Silicon; Sun; Temperature distribution; Nanowire; germanium; nanotechnology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Nanotechnology, 2006. IEEE-NANO 2006. Sixth IEEE Conference on
  • Print_ISBN
    1-4244-0077-5
  • Type

    conf

  • DOI
    10.1109/NANO.2006.247729
  • Filename
    1717179