Title :
Exploring design space using SAVAGE: a simulated annealing based VLSI architecture generator
Author :
Neil, J.P. ; Denyer, P.B.
Author_Institution :
Dept. of Electr. Eng., Edinburgh Univ., UK
Abstract :
The authors present the prototype version of a synthesis system based around an architectural script design method. It is controlled by the computational technique known as simulated annealing. The system is exercized using a 5th order wave digital filter design
Keywords :
VLSI; circuit CAD; simulated annealing; CAD; IC design; SAVAGE; VLSI architecture generator; architectural script design method; prototype version; simulated annealing; synthesis system; wave digital filter design; Computational modeling; Control system synthesis; Costs; Design automation; Design methodology; Research initiatives; Silicon; Simulated annealing; Space exploration; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1990., Proceedings of the 33rd Midwest Symposium on
Conference_Location :
Calgary, Alta.
Print_ISBN :
0-7803-0081-5
DOI :
10.1109/MWSCAS.1990.140663
