• DocumentCode
    2785932
  • Title

    Enabling a Uniform Programming Model Across the Software/Hardware Boundary

  • Author

    Anderson, Erik ; Agron, Jason ; Peck, Wesley ; Stevens, Jim ; Baijot, Fabrice ; Komp, Ed ; Sass, Ron ; Andrews, David

  • Author_Institution
    Inf. & Telecommun. Technol. Center, Kansas Univ., Lawrence, KS
  • fYear
    2006
  • fDate
    24-26 April 2006
  • Firstpage
    89
  • Lastpage
    98
  • Abstract
    In this paper, we present hthreads, a unifying programming model for specifying application threads running within a hybrid CPU/FPGA system. Threads are specified from a single pthreads multithreaded application program and compiled to run on the CPU or synthesized to run on the FPGA. The hthreads system, in general, is unique within the reconfigurable computing community as it abstracts the CPU/FPGA components into a unified custom threaded multiprocessor architecture platform. To support the abstraction of the CPU/FPGA component boundary, we have created the hardware thread interface (HWTI) component that frees the designer from having to specify and embed platform specific instructions to form customized hardware/software interactions. Instead, the hardware thread interface supports the generalized pthreads API semantics, and allows passing of abstract data types between hardware and software threads. Thus the hardware thread interface provides an abstract, platform independent compilation target that enables thread and instruction-level parallelism across the software/hardware boundary
  • Keywords
    application program interfaces; field programmable gate arrays; hardware-software codesign; multi-threading; multiprocessing systems; API semantics; field programmable gate arrays; hardware thread interface; instruction-level parallelism; multithreaded application program; reconfigurable computing; software-hardware boundary; threaded multiprocessor architecture; uniform programming; Abstracts; Application software; Computer architecture; Concurrent computing; Field programmable gate arrays; Hardware; Parallel processing; Programming profession; Software libraries; Yarn;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field-Programmable Custom Computing Machines, 2006. FCCM '06. 14th Annual IEEE Symposium on
  • Conference_Location
    Napa, CA
  • Print_ISBN
    0-7695-2661-6
  • Type

    conf

  • DOI
    10.1109/FCCM.2006.40
  • Filename
    4020898