DocumentCode
2786105
Title
Systematic Characterization of Programmable Packet Processing Pipelines
Author
Attig, Michael ; Brebner, Gordon
Author_Institution
Xilinx Res. Labs., San Jose, CA
fYear
2006
fDate
24-26 April 2006
Firstpage
195
Lastpage
204
Abstract
This paper considers the elaboration of custom pipelines for network packet processing, built upon flexible programmability of pipeline stage granularity. A systematic procedure for accurately characterizing throughput, latency, and FPGA resource requirements, of different programmed pipeline variants is presented. This procedure may be exploited at design time, configuration time, or run time, to program pipeline architectures to meet specific networking application requirements. The procedure is illustrated using three case studies drawn from real-life packet processing at different levels of networking protocol. Detailed results are presented, demonstrating that the procedure estimates pipeline characteristics well, thus allowing rapid architecture space exploration prior to elaboration
Keywords
field programmable gate arrays; packet switching; pipeline processing; protocols; FPGA resource requirements; network packet processing; networking protocol; pipeline stage granularity; programmable packet processing pipelines; systematic characterization; Computer architecture; Delay; Electronic mail; Field programmable gate arrays; Pipeline processing; Protocols; Quality of service; Silicon; Space exploration; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Custom Computing Machines, 2006. FCCM '06. 14th Annual IEEE Symposium on
Conference_Location
Napa, CA
Print_ISBN
0-7695-2661-6
Type
conf
DOI
10.1109/FCCM.2006.67
Filename
4020908
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