Design of a programmable slew-rate op amp

Author

Shin, J.M. ; Yoon, K.S.

Author_Institution

Dept. of Electron. Eng., Inha Univ., South Korea

Volume

1

fYear

1994

fDate

3-5 Aug 1994

Firstpage

142

Abstract

This paper presents the design of a CMOS programmable slew rate operational amplifier. The amplifier proposed in this paper is capable of providing an additional programmable bias current which can be linearly controlled by an external 4 bit digital signal. The circuit designed for slew rate programmability is based upon a newly proposed concept, that is a switched parallel current subtraction circuit with an adaptive biasing technique. By utilizing the newly designed circuit, it was verified that the slew rate was linearly controlled and power dissipation was optimized. If the programmable slew rate amplifier is employed in a data converter, its data conversion time can be easily controlled

Keywords

CMOS analogue integrated circuits; differential amplifiers; operational amplifiers; CMOS IC; adaptive biasing technique; operational amplifier; programmable extra bias current; programmable slew-rate op amp; slew rate programmability; switched parallel current subtraction circuit; Application specific integrated circuits; Data conversion; Design engineering; Design methodology; Operational amplifiers; Power amplifiers; Power dissipation; Signal design; Switching circuits; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1994., Proceedings of the 37th Midwest Symposium on

Conference_Location

Lafayette, LA

Print_ISBN

0-7803-2428-5

Type

conf

DOI

10.1109/MWSCAS.1994.519209

Filename

519209