DocumentCode
2786674
Title
Design of a Reconfigurable Processor for NIST Prime Field ECC
Author
Ananyi, Kendall ; Rakhmatov, Daler
Author_Institution
Dept. of Electr. & Comput. Eng., Victoria Univ., BC
fYear
2006
fDate
24-26 April 2006
Firstpage
333
Lastpage
334
Abstract
This paper describes a reconfigurable processor that provides support for basic elliptic curve cryptographic (ECC) operations over GF(p), such as modular addition, subtraction, multiplication, and inversion. The proposed processor can be configured for any of the five NIST primes with sizes ranging from 192 to 521 bits
Keywords
cryptography; microprocessor chips; reconfigurable architectures; 192 to 521 bit; ECC operations; NIST prime field; elliptic curve cryptographic operations; reconfigurable processor; Adders; Arithmetic; Decoding; Elliptic curve cryptography; Hardware; Inverters; NIST; Read-write memory; Registers; Signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Custom Computing Machines, 2006. FCCM '06. 14th Annual IEEE Symposium on
Conference_Location
Napa, CA
Print_ISBN
0-7695-2661-6
Type
conf
DOI
10.1109/FCCM.2006.36
Filename
4020946
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