• DocumentCode
    2786797
  • Title

    Scalable Hardware Architecture for Real-Time Dynamic Programming Applications

  • Author

    Matthews, Brad ; Elhanany, Itamar

  • Author_Institution
    ECE Dept., Tennessee Univ., Knoxville, TN
  • fYear
    2006
  • fDate
    24-26 April 2006
  • Firstpage
    347
  • Lastpage
    348
  • Abstract
    This paper introduces a novel architecture for performing the core computations required by dynamic programming (DP) techniques. The latter pertain to a vast range of applications that necessitate an optimal sequence of decisions to be issued. An underlying assumption is that a complete model of the environment is provided, whereby the dynamics are governed by a Markov decision process (MDP). Existing DP implementations have traditionally been realized in software. Here, we present a method for exploiting the data parallelism associated with computing both the value function and optimal action set. An optimal policy is obtained four orders of magnitude faster than traditional software-based schemes, establishing the viability of the approach for real-time applications
  • Keywords
    Markov processes; decision theory; dynamic programming; field programmable gate arrays; mathematics computing; real-time systems; Markov decision process; data parallelism; optimal policy; real-time dynamic programming; scalable hardware architecture; software-based schemes; Application software; Computer architecture; Concurrent computing; Dynamic programming; Hardware; Memory architecture; Optimal control; Parallel processing; Senior members; Student members;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field-Programmable Custom Computing Machines, 2006. FCCM '06. 14th Annual IEEE Symposium on
  • Conference_Location
    Napa, CA
  • Print_ISBN
    0-7695-2661-6
  • Type

    conf

  • DOI
    10.1109/FCCM.2006.61
  • Filename
    4020953