Efficient Router Architecture, Design and Performance Exploration for Many-Core Hybrid Photonic Network-on-Chip (2D-PHENIC)

Nowadays, increasing emerging application complexity and improvement in process technology have enabled the design of many-core processors with tens to hundreds of cores on a single chip. Photonic Network-on-Chips (PNoCs) have recently been proposed as an alternative approach with high performance-per-watt characteristics for intra-chip communication. While providing large bandwidth through WDM (Wavelength Division Multiplexing), the main design challenge of conventional hybrid PNoC lies in the control layer, which is generally used for path set-up and also for short message communication. In this paper, we propose architecture and design of an efficient router for control and communication in heterogeneous Many-core Hybrid Photonic Network-on-Chip (2D-PHENIC). In addition, we present detailed complexity and performance evaluation of the proposed architecture.