• DocumentCode
    2787533
  • Title

    Table-lookup based Crossbar Arbitration for Minimal-Routed, 2D Mesh and Torus Networks

  • Author

    Seo, DaeHo ; Thottethodi, Mithuna

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN
  • fYear
    2007
  • fDate
    26-30 March 2007
  • Firstpage
    1
  • Lastpage
    10
  • Abstract
    Crossbar arbitration - which determines the allocation of output ports to packets in the input queues - is a performance-critical stage in the overall performance of routers for input-queued networks. The overall performance of crossbar arbitration depends on two metrics: (a) matching power - the ability of the arbiter to maximize the number of matches between requesting inputs and free outputs and (b) arbitration throughput - the number of such matches per unit time. Ideally, crossbar arbitration should maximize both metrics. Unfortunately, implementing high performance matching schemes compromises arbitration throughput. Similarly, simpler arbitration mechanisms that deliver high arbitration throughput offer lower matching power. The major contribution of this paper is the design of a table-lookup based crossbar arbitration mechanism - TabArb - that delivers superior matching and high arbitration throughput for minimal-routed, two dimensional mesh and torus networks. The two key innovations of TabArb are: (a) it forwards multiple requests from each input port to multiple output ports to expose adequate matching potential and (b) it employs precomputed tables that store maximum cardinality matches for all possible request combinations. Our technique improves the saturation throughput of adaptive routed mesh network by 14.8%. It offers little improvement for the DOR router due to limited opportunity.
  • Keywords
    multiprocessor interconnection networks; table lookup; 2D mesh network; DOR router; TabArb; crossbar arbitration; input-queued network; matching power; table-lookup; torus network; Computer networks; Delay; Impedance matching; Inverters; Logic; Multiprocessor interconnection networks; Routing; Switches; Throughput; Traffic control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing Symposium, 2007. IPDPS 2007. IEEE International
  • Conference_Location
    Long Beach, CA
  • Print_ISBN
    1-4244-0910-1
  • Electronic_ISBN
    1-4244-0910-1
  • Type

    conf

  • DOI
    10.1109/IPDPS.2007.370272
  • Filename
    4228000