DocumentCode
2787563
Title
Reducing Verification Complexity of a Multicore Coherence Protocol Using Assume/Guarantee
Author
Chen, Xiaofang ; Yang, Yu ; Gopalakrishnan, Ganesh ; Chou, Ching-Tsun
Author_Institution
Sch. of Comput., Utah Univ.
fYear
2006
fDate
Nov. 2006
Firstpage
81
Lastpage
88
Abstract
We illustrate how to employ metacircular assume/guarantee reasoning to reduce the verification complexity of finite instances of protocols for safety, using nothing more than an explicit state model checker. The formal underpinnings of our method are based on establishing a simulation relation between the given protocol M, and several overapproximations thereof, Mtilde1,..., Mtilde k. Each Mtildei simulates M, and represents one "view" of it. The Mtildeis depend on each other both to define the abstractions as well as to justify them. We show that in case of our hierarchical coherence protocol, its designer could easily construct each of the Mtildei in a counterexample guided manner. This approach is practical, considerably reduces the verification complexity, and has been successfully applied to a complex hierarchical multicore cache coherence protocol which could not be verified through traditional model checking
Keywords
computational complexity; formal verification; memory protocols; explicit state model checking; hierarchical multicore cache coherence protocol; metacircular assume/guarantee reasoning; safety protocols; verification complexity reduction; Coherence; Computer bugs; Contracts; Explosions; Multicore processing; Protocols; Safety; State-space methods;
fLanguage
English
Publisher
ieee
Conference_Titel
Formal Methods in Computer Aided Design, 2006. FMCAD '06
Conference_Location
San Jose, CA
Print_ISBN
0-7695-2707-8
Type
conf
DOI
10.1109/FMCAD.2006.28
Filename
4021013
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