Title :
Simulation methodology and flow integration for 3D IC stress management
Author :
Nakamoto, Mark ; Radojcic, Riko ; Zhao, Wei ; Dasarapu, Vinay K. ; Karmarkar, Aditya P. ; Xu, Xiaopeng
Author_Institution :
Qualcomm, Inc., San Diego, CA, USA
Abstract :
A new methodology to bridge package and silicon domain simulations is demonstrated using a new data file to facilitate stress information exchange. The flow integration uses equivalent stress conditions to replace sensitive process information and parameterized modules to minimize user interventions for 3D IC stress simulations.
Keywords :
circuit simulation; integrated circuit packaging; 3D IC stress management; 3D IC stress simulations; data file; flow integration; silicon domain simulations; simulation methodology; stress information exchange; Integrated circuit modeling; Semiconductor device modeling; Silicon; Solid modeling; Stress; Three dimensional displays; Through-silicon vias; Through-silicon via (TSV); layout proximity; mechanical stress; modeling; performance variation; reliability;
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2010 IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-5758-8
DOI :
10.1109/CICC.2010.5617422
