Spurious free time-to-digital conversion in an ADPLL using short dithering sequences

This paper proposes an enhancement of the digital phase detection mechanism in an all-digital phase locked loop (ADPLL) operable at multi-GHz by randomization of the reference frequency phase by carefully chosen dither sequences. This renders the digital phase detector in ADPLL free from any phase domain spurious tones as a consequence of ill-conditioned sampling of variable oscillator phase in the time-to-digital converter (TDC). TDC has a typical time quantization in the range of 5 to 30 ps using modern deep sub-micron technologies. This finite dead-band can result in spurious tones, whenever an “integer” relationship arises between the oscillator phase and the TDC sampling process. This anomaly can be resolved using carefully selected spectrum-friendly dithering mechanisms. This work proposes injection of a short sequence dither signal into the reference signal to overcome the quantization introduced limit-cycles. This results in a robust phase tracking and spurious free operation of the ADPLL.