DocumentCode :
2788209
Title :
A 3-dimensional Vernier ring time-to-digital converter in 0.13µm CMOS
Author :
Yu, Jianjun ; Dai, Fa Foster
Author_Institution :
Electr. & Comput. Eng., Auburn Univ., Auburn, AL, USA
fYear :
2010
fDate :
19-22 Sept. 2010
Firstpage :
1
Lastpage :
4
Abstract :
A 3-dimensional Vernier ring time-to-digital converter (TDC) is presented for the first time that greatly improves the measurement time and power consumption and achieves large detectable range and fine resolution simultaneously. The TDC prototype chip achieves 16.5-ps resolution and an 8-bit detectable range with 0.16 mm2 die area in a 0.13μm CMOS technology. The power consumption for the entire TDC is only 4.5mW with 1.5V power supply at 15MSps sample rate.
Keywords :
CMOS integrated circuits; convertors; 3D Vernier ring time-to-digital converter; CMOS technology; fine resolution; power consumption; power supply; size 0.13 mum; Delay; Power demand; Radiation detectors; Semiconductor device measurement; Signal resolution; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2010 IEEE
Conference_Location :
San Jose, CA
ISSN :
0886-5930
Print_ISBN :
978-1-4244-5758-8
Type :
conf
DOI :
10.1109/CICC.2010.5617431
Filename :
5617431
Link To Document :
بازگشت