A new paradigm for exploiting fine-grain parallelism

Proposes a new processing paradigm for exploiting fine-grain parallelism. This paradigm considers a block of instructions (possibly having dependencies) as a single unit, and issues one such a block at a time. Fine-grain parallelism is exploited by overlapping the execution of multiple blocks. In addition, multiple instructions can be executed per cycle from each block, if desired. Dynamic branch prediction is used to fetch new blocks. Preliminary simulation results with the SPEC benchmark suite show this processing paradigm to be capable of sustaining issue rates of 3-4 IPC (instructions per cycle) for nonnumeric programs and 6-10 IPC for numeric programs in the benchmark suite, using existing code compiled for a single-IPC machine. The authors expect to obtain much higher sustained issue rates as they gain more experience both the hardware mechanisms and helpful software transformations