Toward the specification of an ISA for high performance computing engines. I. The hardware perspective

An instruction set architecture (ISA) is a contract between the compiler that provides, in response to a high level language program, directives for the interpreter to carry out, and the interpreter (microarchitecture) that carries out those directives. Implementation structures of today tend to drive ISA definitions, and in general that is a mistake. From the authors´ perspective the ultimate microengine is one constrained only by flow dependencies, so an ISA that facilitates data-flow execution will likely be beneficial even in the face of new microarchitectures