Process characterization and yield assessment in hybrid wafer scale integration

Author

Turner, R. ; Robinson, M. ; Dearman, H. ; Pedder, D.J. ; Munns, A.G. ; Davies, M.J. ; Logan, E.A. ; Jamieson, I.D. ; McLaren, L.M.

Author_Institution

Marconic Electronic Devices Ltd., Lincoln., UK

fYear

1992

fDate

22-24 Jan 1992

Firstpage

155

Lastpage

164

Abstract

Functional yield in the hybrid approach to wafer scale integration (HWSI) is a product of the individual component yields in the HWSI assembly, including the contributions from the interconnection substrate and the pretested ICs mounted onto the substrate, and of the assembly processes employed to construct the HWSI circuit or module. The authors report process characterization and yield results for a high interconnection density silicon substrate technology, and for wire bonding and flip chip solder bonding chip connection technologies that are being developed to support HWSI module construction. The design of a SPARC CPU circuit module for parallel computing applications that uses this technology is also described

Keywords

VLSI; flip-chip devices; hybrid integrated circuits; lead bonding; thin film circuits; HWSI; MCM; MCM-D; SPARC CPU circuit module; Si substrate hybrids; flip chip solder bonding; high interconnection density; hybrid wafer scale integration; interconnection substrate; multichip modules; parallel computing; process characterization; wafer scale integration; wire bonding; yield assessment; yield results; Assembly; Circuit testing; Flip chip; Integrated circuit interconnections; Parallel processing; Silicon; Substrates; Wafer bonding; Wafer scale integration; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Wafer Scale Integration, 1992. Proceedings., [4th] International Conference on

Conference_Location

San Francisco, CA

Print_ISBN

0-8186-2482-5

Type

conf

DOI

10.1109/ICWSI.1992.171806

Filename

171806