DocumentCode :
2788904
Title :
A 16 Gb/s four-wire CDMA-based high speed I/O link with transmitter timing adjustment
Author :
Hsueh, Tzu-Chien ; Pamarti, Sudhakar
Author_Institution :
Univ. of California, Los Angeles, CA, USA
fYear :
2010
fDate :
19-22 Sept. 2010
Firstpage :
1
Lastpage :
4
Abstract :
A simplified Code Division Multiple Access (CDMA) technique has been used to cancel crosstalk in a four-wire signaling high-speed I/O system. To further improve the crosstalk suppression and power efficiency, transmitter (TX) timing adjustment in conjunction with the CDMA-based I/O system is proposed. The integrated transceiver achieves an aggregate 16 Gb/s (5.33 Gb/s/link) data rate and 6 mW/Gb/s/wire power efficiency over four 6" FR4 PCB traces with BER <; 10-12 in a 90 nm standard CMOS technology.
Keywords :
CMOS integrated circuits; code division multiple access; transceivers; CMOS technology; FR4 PCB; bit rate 16 Gbit/s; code division multiple access; crosstalk suppression; four-wire signaling high-speed I/O system; integrated transceiver; power efficiency; size 90 nm; transmitter timing adjustment; Band pass filters; Bit error rate; Clocks; Crosstalk; Delta modulation; Timing; Transceivers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2010 IEEE
Conference_Location :
San Jose, CA
ISSN :
0886-5930
Print_ISBN :
978-1-4244-5758-8
Type :
conf
DOI :
10.1109/CICC.2010.5617472
Filename :
5617472
Link To Document :
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