DocumentCode :
2788995
Title :
A Modulo Scheduling Algorithm for a Coarse-Grain Reconfigurable Array Template
Author :
Hatanaka, Akira ; Bagherzadeh, Nader
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Irvine, CA
fYear :
2007
fDate :
26-30 March 2007
Firstpage :
1
Lastpage :
8
Abstract :
Coarse grain reconfigurable arrays (CGRAs) have been drawing attention due to its programmability and performance. Compilation onto CGRAs is still an open problem. Several groups have proposed algorithms that software pipeline loops onto CGRAs. In this paper, we present an efficient modulo scheduling algorithm for a CGRA template. The novelties of the approach are the separation of resource reservation and scheduling, use of a compact three-dimensional architecture graph and a resource usage aware relocation algorithm. Preliminary experiments indicate that the proposed algorithm can find schedules with small initiation intervals within a reasonable amount of time.
Keywords :
graph theory; reconfigurable architectures; resource allocation; scheduling; coarse-grain reconfigurable array template; modulo scheduling algorithm; resource reservation; software pipeline loop; three-dimensional architecture graph; Application software; Computer architecture; Computer science; Job shop scheduling; Microprocessors; Processor scheduling; Registers; Scheduling algorithm; Software algorithms; USA Councils;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Processing Symposium, 2007. IPDPS 2007. IEEE International
Conference_Location :
Long Beach, CA
Print_ISBN :
1-4244-0910-1
Electronic_ISBN :
1-4244-0910-1
Type :
conf
DOI :
10.1109/IPDPS.2007.370371
Filename :
4228099
Link To Document :
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