High-level design of algorithm-driven architectures: The testability and diagnosability issue

Testability and diagnosability represent a mandatory step to be evaluated in the design of complex WSI (wafer scale integration) architectures before restructuring of the architecture to overcome defects can be performed. The authors propose a solution to such issues based on the analysis of testability and diagnosability of the data flow graph derived from the algorithm that has to be implemented. The results of this analysis can show, even at this level, potential test and diagnosis problems in the final architecture. Guidelines to the architectural mapping are given to overcome such problems in the final architecture definition. The authors also present a testing and diagnosis approach that guarantees optical functional fault coverage under the single-error assumption