DocumentCode
2790528
Title
Towards scalable utilization of embedded manycores in throughput-sensitive applications
Author
Hashemi, Matin ; Ghiasi, Soheil
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of California, Davis, CA, USA
fYear
2011
fDate
9-11 Nov. 2011
Firstpage
110
Lastpage
115
Abstract
Variants of dataflow specification models are widely used to synthesize streaming applications for distributed-memory parallel processors. We argue that current practice of specifying streaming applications using rigid dataflow models, implicitly prohibits a number of platform oriented optimizations and hence, has limited portability and scalability with respect to number of processors. We motivate Functionally-cOnsistent stRucturally-MalLEabe Streaming Specification, dubbed FORMLESS, which refers to raising the abstraction level beyond fixed-structure dataflow to address its portability and scalability limitations. To demonstrate the potential of the idea, we develop a design space exploration scheme to customize the application model for the target platform. Experiments with several common streaming case studies demonstrate improved portability and scalability over conventional dataflow specification models, and confirm the effectiveness of our approach.
Keywords
parallel processing; dataflow specification models; design space exploration scheme; distributed-memory parallel processors; dubbed FORMLESS; embedded manycores; fixed-structure dataflow; functionally-consistent structurally-malleabe streaming specification; platform oriented optimizations; rigid dataflow models; scalable utilization; throughput-sensitive applications; Computational modeling; Estimation; Program processors; Scalability; Space exploration; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
High Level Design Validation and Test Workshop (HLDVT), 2011 IEEE International
Conference_Location
Napa Valley, CA
ISSN
1552-6674
Print_ISBN
978-1-4577-1744-4
Type
conf
DOI
10.1109/HLDVT.2011.6113985
Filename
6113985
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