A 140mA 90nm CMOS low drop-out regulator with −56dB power supply rejection at 10MHz

Author

Amer, Ahmed ; Sánchez-Sinencio, Edgar

Author_Institution

Electr. & Comput. Eng. Dept., Texas A&M Univ., College Station, TX, USA

fYear

2010

fDate

19-22 Sept. 2010

Firstpage

1

Lastpage

4

Abstract

A high power supply rejection (PSR) low drop-out (LDO) voltage regulator employing a simple supply ripple cancellation adaptive technique is presented in this paper. The LDO is implemented in 90nm digital CMOS process and occupies an active area of 0.015mm². The measured PSR is better than -50dB up to 10MHz across the load current range of 140mA with a drop-out voltage of 0.15V. The quiescent current (I_Q) varies adaptively from 33μA at no load to 145μA at maximum load with a current efficiency of 99.9%. Load regulation of 6mV for a 140mA step in load current is measured.

Keywords

CMOS integrated circuits; power supply circuits; voltage regulators; current 140 mA; digital CMOS process; frequency 10 MHz; high power supply rejection; load current; load regulation; low drop-out voltage regulator; quiescent current; size 90 nm; supply ripple cancellation adaptive technique; voltage 0.15 V; Capacitance; Capacitors; Current measurement; Digital signal processing; Regulators; Transistors; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference (CICC), 2010 IEEE

Conference_Location

San Jose, CA

ISSN

0886-5930

Print_ISBN

978-1-4244-5758-8

Type

conf

DOI

10.1109/CICC.2010.5617585

Filename

5617585