A 5Gb/s 2×2 MIMO crosstalk cancellation scheme for high-speed I/Os

We describe a multiple-input multiple-output crosstalk cancellation (MIMO-XTC) architecture, particularly applicable to single-ended I/O. The MIMO architecture efficiently cancels crosstalk and improves jitter and eye-opening at the same time. A continuous-time prototype design was fabricated using a 130nm CMOS process and occupies 0.03mm² of die area. The XTC equalizer performance has been verified for a variety of FR4 channel spacings and data rates. Measured eye diagrams show that the jitter_pp reduces by 67%UI and the vertical eye opening increases by 58.2% at 5Gb/s. The prototype MIMO-XTC circuit consumes 2.8 mW/Gbps/lane which is roughly 2 times lower than other XTC schemes.