Title :
Smart simulation using collaborative formal and simulation engines
Author :
Pei-Hsin Ho ; Shiple, T. ; Harer, K. ; Kukula, J. ; Damiano, R. ; Bertacco, V. ; Taylor, J. ; Jiang Long
Author_Institution :
Synopsys Inc., USA
Abstract :
We present Ketchum, a tool that was developed to improve the productivity of simulation-based functional verification by providing two capabilities: (1) automatic test generation and (2) unreachability analysis. Given a set of "interesting" signals in the design under test (DUT), automatic test generation creates input stimuli that drive the DUT through as many different combinations (called coverage states) of these signals as possible to thoroughly exercise the DUT. Unreachability analysis identifies as many unreachable coverage states as possible.
Keywords :
circuit simulation; logic CAD; logic simulation; logic testing; Ketchum; automatic test generation; collaborative; design under test; functional verification; simulation; simulation engines; unreachability analysis; Analytical models; Automatic testing; Collaboration; Computational modeling; Computer simulation; Engines; Hardware; Productivity; Signal design; Signal generators;
Conference_Titel :
Computer Aided Design, 2000. ICCAD-2000. IEEE/ACM International Conference on
Conference_Location :
San Jose, CA, USA
Print_ISBN :
0-7803-6445-7
DOI :
10.1109/ICCAD.2000.896461