Title :
Compiling scientific code for complex memory hierarchies
Author :
Carr, Steve ; Kennedy, Ken
Author_Institution :
Dept. of Comput. Sci., Rice Univ., Houston, TX, USA
Abstract :
The trend in high-performance microprocessor design is toward increasing computational power on the chip. At the same time, memory size is increasing but memory speed is not. The result is an imbalance between computation speed and memory speed. This imbalance is leading machine designers to use more complicated memory hierarchies. In turn, programmers are explicitly restructuring codes to perform well on particular memory systems, leading to machine-specific programs. Can we enhance our compiler technology to obviate the need for explicit programming of the memory hierarchy? The paper surveys some recent experiments with compiler techniques designed to address this problem. The results, though only preliminary, show great promise
Keywords :
memory architecture; program compilers; compiler technology; complex memory hierarchies; memory hierarchy; memory size; scientific code; Cache memory; Computer aided instruction; Computer science; Delay; Microprocessors; Optimizing compilers; Program processors; Programming profession; Registers; Tires;
Conference_Titel :
System Sciences, 1991. Proceedings of the Twenty-Fourth Annual Hawaii International Conference on
Conference_Location :
Kauai, HI
DOI :
10.1109/HICSS.1991.183925