DocumentCode
2791114
Title
Supporting Quality of Service in High-Performance Servers
Author
Solihin, Yan ; Guo, Fei ; Kim, Seongbeom ; Liu, Fang
Author_Institution
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC
fYear
2007
fDate
26-30 March 2007
Firstpage
1
Lastpage
6
Abstract
This paper describes issues that we have analyzed and technology that we have developed in supporting quality of service in high-performance servers. More specifically, we target on-chip cache resource allocation and efficiency needed for guaranteeing certain performance levels on chip multi-processor (CMP) architectures. Both prior and ongoing work are summarized in this paper.
Keywords
cache storage; microprocessor chips; multiprocessing systems; parallel architectures; quality of service; resource allocation; chip multiprocessor architectures; high-performance servers; on-chip cache resource allocation; quality of service; Quality of service;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel and Distributed Processing Symposium, 2007. IPDPS 2007. IEEE International
Conference_Location
Long Beach, CA
Print_ISBN
1-4244-0910-1
Electronic_ISBN
1-4244-0910-1
Type
conf
DOI
10.1109/IPDPS.2007.370508
Filename
4228236
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