Verification of Delta-Sigma converters using adaptive regression modeling

A new verification technique for /spl Delta//spl Sigma/ analog-to-digital converters (ADC) is proposed. The ADC is partitioned into functional blocks, and adaptive regression models for each partition are constructed using transistor-level simulation data. Non-idealities in circuit behavior are captured by the adaptive regression technique from the collected data. The algorithms have been implemented in a simulation program ARSIM (Adaptive Regression Simulator), which performs data sampling, model building, and simulation. Experimental results using ARSIM are shown on a second-order /spl Delta//spl Sigma/ modulator, and they demonstrate the effectiveness of our technique as a fast and accurate approach for verifying /spl Delta//spl Sigma/ converters.