A comparative analysis of CMOS low noise amplifiers for RF applications

Author

Ge, Yongmin ; Mayaram, Kartikeya

Author_Institution

Sch. of Electr. Eng. & Comput. Sci., Washington State Univ., Pullman, WA, USA

Volume

4

fYear

1998

fDate

31 May-3 Jun 1998

Firstpage

349

Abstract

Four CMOS RF low noise amplifier (LNA) circuits have been analyzed. These analyses include the effect of induced gate noise for the MOSFET. The noise factor contribution from each noise source is derived and these circuits are then compared for a minimum noise factor. The MOSIS HP 0.35 μm and 0.8 μm CMOS technologies have been used for performance comparisons. An automatic synthesis system for LNA design is also described

Keywords

CMOS analogue integrated circuits; SPICE; circuit CAD; circuit layout CAD; equivalent circuits; feedback amplifiers; integrated circuit layout; integrated circuit noise; radio receivers; radiofrequency amplifiers; 0.35 micron; 0.8 micron; CMOS RF low noise amplifier circuits; LNA layout; MOSIS HP CMOS technologies; RF receivers; SPICE; automatic synthesis system; common-gate stage; common-source stage; induced gate noise; minimum noise factor; noise factor contribution; optimization; performance comparisons; shunt feedback; source degeneration; Acoustic noise; CMOS technology; Circuit noise; Inductors; Low-noise amplifiers; MOSFET circuits; Noise figure; Noise generators; Radio frequency; Radiofrequency amplifiers;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on

Conference_Location

Monterey, CA

Print_ISBN

0-7803-4455-3

Type

conf

DOI

10.1109/ISCAS.1998.698844

Filename

698844