DocumentCode :
2794219
Title :
Pattern dynamics to determine the operating state in transistor networks
Author :
Mizutani, Hikaru ; Tanaka, Mamoru
Author_Institution :
Dept. of Electr. Eng., Shonan Inst. of Technol., Tokyo, Japan
fYear :
1990
fDate :
12-14 Aug 1990
Firstpage :
265
Abstract :
It is important to use some error correcting learning methods (ECLMs) to obtain the correct binary pattern from the assumed pattern for the weights in a neural network. In this study, an ECLM which is called `S-control´ is proposed to determine the correct operating state in any bipolar transistor network (BTN). Each diode of the Ebers-Moll model is replaced with a directional switch called an S-branch which has `on´ and `off´ states
Keywords :
bipolar transistor circuits; learning systems; neural nets; Ebers-Moll model; S-branch; S-control; binary pattern; bipolar transistor network; directional switch; error correcting learning methods; neural network; operating state; pattern dynamics; Algorithm design and analysis; Diodes; Equations; Error correction; Intelligent networks; Matrix decomposition; Neural networks; Switches; Switching circuits; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1990., Proceedings of the 33rd Midwest Symposium on
Conference_Location :
Calgary, Alta.
Print_ISBN :
0-7803-0081-5
Type :
conf
DOI :
10.1109/MWSCAS.1990.140703
Filename :
140703
Link To Document :
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