New high voltage integrated circuits using self-shielding technique

A self-shielding technique in a self-isolation structure which makes it possible to obtain a high-voltage interconnection without degrading the blocking capability of the electrical isolation structure has been introduced and demonstrated as a high voltage level-shifter in ISPSD´96 (Fujihira et al., 1996). However, a cost-effective self-isolation structure has difficulty in suppressing the action of a parasitic thyristor or bipolar transistor completely, because of the displacement current flowing through the depletion layer capacitance of the n-well/p-sub junction caused by the IGBT switching that has high dV/dt. In this work, by applying the optimized n-well sheet resistance and design rule in the high-side n-well region, new high voltage integrated circuits (HVIC) with excellent dV/dt robustness using the self-shielding technique and self-isolation structure designed for 600 V class IGBT invertor circuits is experimentally demonstrated for the first time