DocumentCode :
2794579
Title :
Hardware Implementation of 2-Opt Local Search Algorithm for the Traveling Salesman Problem
Author :
Mavroidis, I. ; Papaefstathiou, I. ; Pnevmatikatos, D.
Author_Institution :
Tech. Univ. of Crete, Kounoupidiana
fYear :
2007
fDate :
28-30 May 2007
Firstpage :
41
Lastpage :
47
Abstract :
In this paper we discuss how one of the most famous local optimization algorithms for the Traveling Salesman Problem, the 2-Opt, can be efficiently implemented in hardware for Euclidean TSP instances up to a few hundred cities. We introduce the notion of "symmetrical 2-Opt moves" which allows us to uncover fine-grain parallelism when executing the specified algorithm. We propose a novel architecture that exploits this parallelism. A subset of the TSPLIB benchmark is used to evaluate the proposed architecture and its ASIC implementation, which exhibits better final results and an average speedup of 20 when compared with the state-of-the-art software implementation. Our approach produces, to the best of our knowledge, the fastest to date TSP 2-Opt solver for small-scale Euclidean TSP instances.
Keywords :
parallel architectures; search problems; travelling salesman problems; 2-Opt local search algorithm; fine-grain parallelism; hardware implementation; local optimization algorithm; parallel architecture; traveling salesman problem; Ant colony optimization; Application specific integrated circuits; Cities and towns; Computer architecture; Crystallography; DNA; Hardware; Microprocessors; Partitioning algorithms; Traveling salesman problems;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Rapid System Prototyping, 2007. RSP 2007. 18th IEEE/IFIP International Workshop on
Conference_Location :
Porto Alegre
ISSN :
1074-6005
Print_ISBN :
0-7695-2834-1
Type :
conf
DOI :
10.1109/RSP.2007.24
Filename :
4228483
Link To Document :
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