Design of high-speed Boundary-scan master controller base on SOPC

Author

Chen Shengjian ; Zhou Yin ; Zhu Dongxu ; Guo Shanliang

Author_Institution

Dept. of Control Eng., Acad. of Armored Force Eng., Beijing, China

fYear

2011

fDate

15-17 July 2011

Firstpage

1195

Lastpage

1198

Abstract

According to the IEEE Std 1149.1, a kind of high speed Boundary-scan master controller is designed base on SOPC. Through the master controller´s configuration, users can get the control signals which are used to test the output, and the frequency of the test clock can be as high as 50MHZ, the efficiency of Boundary-scan test improve greatly. Meanwhile, as a practical value component, the master controller IP core can be used to SOPC´s test without special boundary scan test equipment. The timing simulation waveforms and digital oscilloscope observation prove that the test signals generated by Boundary-scan master controller meet the test requirements, and the design is reasonable.

Keywords

boundary scan testing; system-on-chip; IEEE Std 1149.1; SOPC; boundary-scan test; digital oscilloscope observation; frequency; high speed boundary-scan master controller; master controller IP core; master controller configuration; test clock; test signal; timing simulation waveform; Clocks; Hardware; IEEE standards; IP networks; Integrated circuits; Registers; Timing; Boundary-scan Master; IEEE1149.1; SOPC;

fLanguage

English

Publisher

ieee

Conference_Titel

Mechanic Automation and Control Engineering (MACE), 2011 Second International Conference on

Conference_Location

Hohhot

Print_ISBN

978-1-4244-9436-1

Type

conf

DOI

10.1109/MACE.2011.5987152

Filename

5987152