DocumentCode
2795763
Title
PRUS - processor network for digital circuit implementation
Author
Hyduke, Stanley ; Hahanov, Vladimir ; Obrizan, Volodymyr ; Guz, Olesya
Author_Institution
Aldec Inc., USA
fYear
2005
fDate
30 Aug.-3 Sept. 2005
Firstpage
239
Lastpage
242
Abstract
This paper offers high-performance technology for processing Boolean equations, based on compiler synchronized parallel-processor network-based logic device PRUS (programmable unlimited systems) - single-bit spherical multiprocessor, implemented into ASIC. This technology allows to perform parallel, sequential and pipelined Boolean equations processing using AND, OR, NOT, XOR operations. Multiprocessor is very efficient in hardware implementation - e.g. 256MB RAM is enough for processing Boolean equations containing 20 millions gates.
Keywords
Boolean functions; application specific integrated circuits; logic gates; multiprocessing systems; parallel processing; pipeline processing; program compilers; ASIC; Boolean equation; compiler synchronized parallel-processor network; digital circuit implementation; logic device; logic gates; multiprocessor system; programmable unlimited system; Application specific integrated circuits; Digital circuits; Emulation; Equations; Flip-flops; Hardware; Logic devices; Random access memory; Read-write memory; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital System Design, 2005. Proceedings. 8th Euromicro Conference on
Print_ISBN
0-7695-2433-8
Type
conf
DOI
10.1109/DSD.2005.65
Filename
1559809
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