DocumentCode
2797233
Title
Distributed arithmetic LMS adaptive filter implementation without look-up table
Author
Trakultritrung, Anirut ; Thanangchusin, Ekkawin ; Chivapreecha, Sorawat
Author_Institution
Dept. of Telecommun. Eng., King Mongkut´´s Inst. of Technol. Ladkrabang, Bangkok, Thailand
fYear
2012
fDate
16-18 May 2012
Firstpage
1
Lastpage
4
Abstract
This paper presents an implementation of least mean squared (LMS) adaptive filter using distributed arithmetic (DA) for hardware realization. Coefficient-distributive DA will be used instead of conventional DA for more appropriation to use with adaptive filter that filter coefficients are varied by time. Moreover, adder network and multiplexer structure will be used in coefficient-distributive DA which makes the proposed LMS adaptive filter be multiplierless digital filter and also without using look-up table (LUT). The VHDL is used for hardware design and then synthesis and configure onto FPGA for real-time adaptive filtering experiment. Finally, experimental and simulation results are shown to ensure our proposed LMS adaptive filter can work.
Keywords
adaptive filters; adders; digital filters; distributed arithmetic; field programmable gate arrays; least mean squares methods; FPGA; VHDL; adder network; coefficient-distributive DA; distributed arithmetic LMS adaptive filter implementation; filter coefficients; hardware design; hardware realization; least mean squared adaptive filter; multiplexer structure; multiplierless digital filter; real-time adaptive filtering experiment; Adaptive filters; Adders; Finite impulse response filter; Least squares approximation; Multiplexing; Table lookup; LMS algorithm; adaptive filters; distributed arithmetic (DA);
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON), 2012 9th International Conference on
Conference_Location
Phetchaburi
Print_ISBN
978-1-4673-2026-9
Type
conf
DOI
10.1109/ECTICon.2012.6254284
Filename
6254284
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