DocumentCode :
2797429
Title :
A new CMOS double-upconverter with half-LO for DTV tuner
Author :
Woo, S.H. ; Lee, K. ; Cho, G.-H.
Author_Institution :
Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Taejon, South Korea
fYear :
2000
fDate :
2000
Firstpage :
211
Lastpage :
214
Abstract :
A new CMOS Double-Upconverter (DUC) with half-LO for a DTV (Digital TV) tuner is proposed. It converts a wide-band input video RF signal spanning from 48 MHz to 810 MHz to an IF of 932 MHz with half local oscillator frequencies from 490 MHz to 871 MHz. The proposed architecture reduces the local oscillator frequency to half, which enables the integration on a single chip and reduces the overall power consumption. It also makes the image component low with its architectural property devised on the basis of the Weaver architecture. It is implemented with 0.8 μm CMOS technology modified for RF applications
Keywords :
CMOS analogue integrated circuits; UHF frequency convertors; UHF integrated circuits; UHF mixers; application specific integrated circuits; circuit tuning; digital television; television receivers; 0.8 micron; 48 to 932 MHz; ASIC; CMOS double-upconverter; IF signal; Weaver architecture; digital TV tuner; half local oscillator frequencies; half-LO frequencies; low image component; power consumption reduction; single chip integration; submicron CMOS technology; wideband input video RF signal; CMOS process; CMOS technology; Digital TV; Frequency conversion; Local oscillators; RF signals; Radio frequency; Transconductors; Tuners; Wideband;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASICs, 2000. AP-ASIC 2000. Proceedings of the Second IEEE Asia Pacific Conference on
Conference_Location :
Cheju
Print_ISBN :
0-7803-6470-8
Type :
conf
DOI :
10.1109/APASIC.2000.896946
Filename :
896946
Link To Document :
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