DocumentCode
2797480
Title
Interface synthesis for IP based design
Author
Park, Bong-II ; Park, In-Cheol ; Kyung, Chong-Min
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Taejon, South Korea
fYear
2000
fDate
2000
Firstpage
227
Lastpage
230
Abstract
In system-on-a-chip design, interfacing of Intellectual Property (IP) blocks is one of the most important issues. Since most IPs are provided by different vendors, they have different interface schemes and different operating frequencies. In this paper, we propose a new interface synthesis method that enables one not only to handle the interface between IPs with different operating frequencies but also to minimize the hardware resource required for the interface. We have demonstrated the proposed algorithm by applying it to a real design example, MP3 decoder, and verified the IIS-to-PCI protocol converter on a real hardware system
Keywords
application specific integrated circuits; circuit CAD; finite state machines; industrial property; integrated circuit design; protocols; IIS-to-PCI protocol converter; IP based design; MP3 decoder; hardware resource; intellectual property blocks; interface schemes; interface synthesis method; system-on-a-chip design; Algorithm design and analysis; Clocks; Decoding; Design methodology; Digital audio players; Frequency synthesizers; Hardware; Protocols; System-on-a-chip; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
ASICs, 2000. AP-ASIC 2000. Proceedings of the Second IEEE Asia Pacific Conference on
Conference_Location
Cheju
Print_ISBN
0-7803-6470-8
Type
conf
DOI
10.1109/APASIC.2000.896950
Filename
896950
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