Testability features of the MDSP [Multimedia Fixed Point Digital Signal Processor]

Author

Choi, Wonseok ; Song, Ohyoung ; Chang, Hoon

Author_Institution

Sch. of Electr. & Electron. Eng., Chung-Ang Univ., South Korea

fYear

2000

fDate

2000

Firstpage

281

Lastpage

284

Abstract

In this paper, we describe the design-for-testability (DFT) features of the MDSP (Multimedia Fixed Point Digital Signal Processor) to guarantee high reliability. This chip performs digital signal processing for a portable multimedia function. The DFT feature includes full scan-design, BIST (Built-In-Self-Test) and IEEE 1149.1 (JTAG boundary scan)

Keywords

boundary scan testing; built-in self test; design for testability; digital signal processing chips; fixed point arithmetic; integrated circuit reliability; integrated circuit testing; logic testing; multimedia systems; parallel architectures; BIST; DFT features; IEEE 1149.1; JTAG boundary scan; built-in-self-test; design-for-testability; digital signal processor; full scan-design; high reliability; multimedia fixed point DSP; portable multimedia function; Application specific integrated circuits; Built-in self-test; Circuit testing; Clocks; Design for testability; Digital signal processing chips; Digital signal processors; Phase locked loops; Signal design; Signal processing algorithms;

fLanguage

English

Publisher

ieee

Conference_Titel

ASICs, 2000. AP-ASIC 2000. Proceedings of the Second IEEE Asia Pacific Conference on

Conference_Location

Cheju

Print_ISBN

0-7803-6470-8

Type

conf

DOI

10.1109/APASIC.2000.896963

Filename

896963