DocumentCode :
2798017
Title :
3D graphics system with VLIW processor for geometry acceleration
Author :
Jeon, Young-Wook ; Kwon, Young-Su ; Im, Yeon-Ho ; Lee, Jun-Hee ; Nam, Sang-Joon ; Kim, Byung-Woon ; Kyung, Chong-Min
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Seoul, South Korea
fYear :
2000
fDate :
2000
Firstpage :
367
Lastpage :
370
Abstract :
To process enormous 3D data, we have designed a VLIW (Very Long Instruction Word) processor called FLOVA (Floating-Point VLIW Architecture) exploiting the ILP (Instruction-Level Parallelism) in 3D programs. This paper presents FGA (FLOVA Geometry Accelerator) that is the 3D graphics system and it almost removes the time required to process in the geometry stage. We have developed the 3D graphics library, FGA-GL, to supports the FGA system. The deferred primitive rendering algorithm of FGA-GL enables the geometry processing of the primitive data to be done concurrently with the host job such as primitive data management or game play. FGA improves the average performance of 3D graphics system by 2.5-3.0
Keywords :
VLSI; add-on boards; computer graphic equipment; floating point arithmetic; microprocessor chips; parallel architectures; rendering (computer graphics); solid modelling; 3D data processing; 3D graphics system; 3D programs; FGA-GL 3D graphics library; FLOVA; VLIW processor; deferred primitive rendering algorithm; floating-point VLIW architecture; geometry acceleration; instruction-level parallelism; very long instruction word; Acceleration; Computer graphics; Electronics industry; Engines; Geometry; Libraries; Parallel processing; Pipelines; Rendering (computer graphics); VLIW;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASICs, 2000. AP-ASIC 2000. Proceedings of the Second IEEE Asia Pacific Conference on
Conference_Location :
Cheju
Print_ISBN :
0-7803-6470-8
Type :
conf
DOI :
10.1109/APASIC.2000.896985
Filename :
896985
Link To Document :
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